1. Field of the Invention
This invention relates to processors and, more particularly, to implementation of cryptographic algorithms.
2. Description of the Related Art
Securing transactions and communications against tampering, interception and unauthorized use has become a problem of increasing significance as new forms of electronic commerce and communication proliferate. For example, many businesses provide customers with Internet-based purchasing mechanisms, such as web pages via which customers may convey order and payment details. Such details often include sensitive information, such as credit card numbers, that might be subject to fraudulent use if intercepted by a third party.
To provide a measure of security for sensitive data, cryptographic algorithms have been developed that may allow encryption of sensitive information before it is conveyed over an insecure channel. The information may then be decrypted and used by the receiver. However, as the performance of generally available computer technology continues to increase (e.g., due to development of faster microprocessors), less sophisticated cryptographic algorithms become increasingly vulnerable to compromise or attack.
More sophisticated cryptographic algorithms are continually evolving to meet the threat posed by new types of attacks. However, as cryptographic algorithms become increasingly powerful, they often become computationally more complex to implement, potentially adding overhead to secure transactions and consequently reducing their performance. Further, implementing such algorithms within processor hardware presents additional challenges, such as mitigation of the impact of the additional hardware on processor area, power consumption, routing and floorplanning, etc.